In the sequence of manufacturing semiconductor devices, a vacuum process, such as a CVD film forming process or plasma etching process, is performed on a target substrate or semiconductor wafer. During such a process, the target substrate or semiconductor wafer is heated by a substrate table serving as a heater, so that the semiconductor wafer is set at a predetermined temperature.
As a heater of this kind, a stainless heater is conventionally used, but, in recent years, there has been proposed use of a ceramic heater, which is corrosion-resistant relative to halogen family gases used in the processes described above and has a high thermal efficiency (Patent Document 1 and so forth). The ceramic heater includes a heating element made of a refractory metal and embedded in a base body made of a compacted ceramic sintered body, such as AlN, which serves as a table for placing a target substrate thereon.
Where a substrate table comprising a ceramic heater is used in a substrate processing apparatus, the bottom of the substrate table is connected to one end of a support member formed of a ceramic cylinder, while the other end of the support member is connected to the bottom of a chamber. Electric feed lines for feeding electricity to the heating element are disposed in the support member and connected to terminals of the heating element. A power supply is externally disposed to feed electricity through the electric feed lines and electric feed terminals to the heating element.
A substrate table comprising a ceramic heater includes electric feed terminals near the junction to the support member, and thus the heating element inevitably has a lower density at this portion. Further, at the junction of the substrate table to the support member, heat can be discharged by thermal conduction through the support member. Consequently, cool spots (portions having a lower temperature than the portions around them) are generated around the junction of the substrate table, and thermal stress concentration occurs at these portions and brings about cracks near the junction with a considerable frequency. If the temperature around the junction is increased by the heating element embedded in the substrate table to solve this problem, the temperature distribution on the substrate mount face of the substrate table is less optimized to the process.
Patent Documents 2 and 3 disclose techniques for relaxing the thermal stress at the junction thereby preventing crack generation, but these techniques require complicate shaping mainly for the support member. Further, in recent years, along with an increase in the size of semiconductor wafers, the size of substrate tables have also increased. This trend makes it less effective to rely on the shape of the support member in relaxing the thermal stress, and thus makes it difficult to reliably prevent crack generation.
[Patent Document 1]
Jpn. Pat. Appln. KOKAI Publication No. 7-272834
[Patent Document 2]
Jpn. Pat. Appln. KOKAI Publication No. 2001-250858
[Patent Document 3]
Jpn. Pat. Appln. KOKAI Publication No. 2003-289024